The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Jun. 30, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Hiroshi Ashida, Fujisawa, JP;

Yoji Ohashi, Fucyu, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01S 13/02 (2006.01); G01S 7/03 (2006.01); H01P 1/162 (2006.01); H01P 5/02 (2006.01); H01P 3/16 (2006.01);
U.S. Cl.
CPC ...
G01S 7/03 (2013.01); G01S 13/0209 (2013.01); H01P 1/162 (2013.01); H01P 3/16 (2013.01); H01P 5/028 (2013.01);
Abstract

A stacked-waveguide substrate includes: a body configured to include a first dielectric-substrate, a second dielectric-substrate, and a third dielectric-substrate which are stacked in this order; a first conductor-pattern configured to be formed on a bottom surface of the first dielectric-substrate; a second conductor-pattern configured to be formed on a top surface of the third dielectric-substrate in a position corresponding to the first conductor-pattern; a first conductor-film configured to be located at an interface between the first dielectric-substrate and the second dielectric-substrate, and to have a first opening which faces the first conductor-pattern; a second conductor-film configured to be located at an interface between the second dielectric-substrate and the third dielectric-substrate, and to have a second opening which faces the second conductor-pattern; a first wiring line configured to cross the first opening to the first conductor-pattern; and a second wiring line configured to cross the second opening to the second conductor-pattern.


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