The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Jun. 12, 2015
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Bo Kyeom Kim, Gyeonggi-do, KR;

Tae Seung Shin, Chungcheongbuk-do, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/44 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31701 (2013.01); G11C 29/44 (2013.01); G01R 31/31727 (2013.01);
Abstract

A test mode circuit of a semiconductor device includes a test mode activating signal generation unit suitable for generating a test mode activating signal in response to a test signal; a test clock generation unit suitable for generating a plurality of test clocks in response to the test mode activating signal and a control clock; a test control signal generation unit suitable for generating test control signals based on the plurality of test clocks of a control signal input cycle, wherein the plurality of test clocks have the control signal input cycle and a data input cycle; and an internal control signal generation unit suitable for generating a plurality of control signals to perform a test operation in response to the test control signals and input data.


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