The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Apr. 07, 2016
Applicant:

General Electric Company, Schenectady, NY (US);

Inventors:

Jason Harris Karp, Niskayuna, NY (US);

Christopher James Kapusta, Delanson, NY (US);

Paul Jeffrey Gillespie, Charlton, NY (US);

Christopher Fred Keimel, Niskayuna, NY (US);

Jeffrey Michael Ashe, Gloversville, NY (US);

James Enrico Sabatini, Scotia, NY (US);

Assignee:

General Electric Company, Niskayuna, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
A61B 5/1455 (2006.01); A61B 5/00 (2006.01); A61B 5/029 (2006.01); A61B 5/08 (2006.01); H01L 25/075 (2006.01); H05K 1/18 (2006.01); H01L 33/62 (2010.01);
U.S. Cl.
CPC ...
A61B 5/14552 (2013.01); A61B 5/0002 (2013.01); A61B 5/6826 (2013.01); A61B 5/742 (2013.01); A61B 5/029 (2013.01); A61B 5/0816 (2013.01); A61B 2562/0238 (2013.01); A61B 2562/046 (2013.01); A61B 2562/12 (2013.01); A61B 2562/164 (2013.01); A61B 2562/222 (2013.01); A61B 2562/227 (2013.01); H01L 25/0753 (2013.01); H01L 33/62 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/181 (2013.01); H05K 1/189 (2013.01); H05K 2201/10106 (2013.01); H05K 2201/10151 (2013.01); Y10T 29/49139 (2015.01);
Abstract

An array of emitters includes a device substrate having first and second sides, a thermally and electrically conductive layer disposed on the first side of the device substrate, and an interconnect layer disposed on a first plurality of portions of the second side of the device substrate. The array of the emitters further includes a plurality of emitters disposed in a second plurality of portions of the device substrate, where the plurality of emitters is electrically coupled to the thermally and electrically conductive layer. Also, the array of the emitters includes a plurality of wirebond contacts configured to electrically couple a portion of the interconnect layer to a corresponding emitter of the plurality of emitters, and a plurality of encapsulations, where one or more encapsulations of the plurality of encapsulations are disposed on at least a portion of a corresponding wirebond contact of the plurality of wirebond contacts.


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