The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2017

Filed:

Dec. 03, 2013
Applicant:

Maxim Integrated Products, Inc., San Jose, CA (US);

Inventor:

Suresh Hariharan, Livermore, CA (US);

Assignee:

Maxim Integrated Products, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05B 33/08 (2006.01);
U.S. Cl.
CPC ...
H05B 33/0845 (2013.01); H05B 33/0896 (2013.01);
Abstract

An apparatus and method provides a driver circuit that provides for power factor correction (PFC) to a load, such as a solid-state lighting (SSL) device, such as, for example, a light emitting diode (LED) or an array or cluster of LEDs. A programmable reference is provided in the circuit to operate in a fixed frequency peak current mode control (FFPCMC) or in a fixed frequency average current mode control (FFACMC). A driver circuit is employed to operate the SSL device using power derived from a main power source which may be DC or AC. In a FFPCMC embodiment, a programmable power reference is programmed to be a fixed DC voltage. In a FFACMC embodiment, source input current to the circuit can be programmed to be proportional to the rectified AC voltage after a bridge rectifier.


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