The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2017

Filed:

Feb. 16, 2016
Applicant:

Postech Academy—industry Foundation, Pohang-si, Gyeongsangbuk-do, KR;

Inventors:

Jae Joon Kim, Pohang-si, KR;

Doo Bock Lee, Seoul, KR;

Jun Ki Park, Daegu, KR;

Eun Woo Song, Daegu, KR;

Assignee:

POSTECH ACADEMY—INDUSTRY FOUNDATION, Pohang-si, Gyeongsangbuk-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01); G09G 5/00 (2006.01); H03L 7/089 (2006.01); G09G 5/12 (2006.01); G09G 3/20 (2006.01); G09G 3/36 (2006.01); H03L 7/099 (2006.01); H03L 7/23 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); G09G 3/20 (2013.01); G09G 3/2092 (2013.01); G09G 3/3674 (2013.01); G09G 5/12 (2013.01); H03L 7/0995 (2013.01); H03L 7/235 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01); G09G 2330/06 (2013.01);
Abstract

The present invention relates to a method for generating a reference signal to drive a display apparatus. A method according to the present invention may comprise generating a reference signal having a training pattern being repeated with a periodicity of two clock terms (CTs); and transmitting the reference signal to a phase locked loop (PLL). Each CT has a single embedded clock bit (CB) and a plurality of data bits, and the reference signal has a rising edge at a start point of a first CB corresponding to a first unit interval (UI) of a first CT, and a rising edge at an end point of a second CB corresponding to a first UI of a second CT. According to exemplary embodiments of the present disclosure, energy consumption and EMI effects can be remarkably reduced, and a complexity of PLL can be reduced.


Find Patent Forward Citations

Loading…