The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2017

Filed:

Oct. 05, 2016
Applicant:

Silab Tech Pvt. Ltd., Bengaluru, Karnataka, IN;

Inventors:

Biman Chattopadhyay, Bengaluru, IN;

Ravi Mehta, Bengaluru, IN;

Assignee:

SILAB TECH PVT. LTD., Karnataka, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H03L 7/08 (2006.01); H03K 19/21 (2006.01); H03L 7/099 (2006.01); H03L 7/091 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0807 (2013.01); H03K 19/21 (2013.01); H03L 7/091 (2013.01); H03L 7/099 (2013.01); H04L 7/0331 (2013.01);
Abstract

A clock and data recovery circuit includes a phase detector, an adder, and an oscillator circuit. The phase detector includes a sampling circuit, a comparison circuit, and a resampling circuit. The sampling circuit includes first through fourth flip-flops for receiving a data signal and first through fourth clock signals, and generating first through fourth sampling signals. The comparison circuit includes first through fourth logic gates for receiving the first through fourth sampling signals and generating first through fourth comparison signals, respectively. The resampling circuit includes fifth through eighth flip-flops for receiving the first through fourth comparison signals and the first through fourth clock signals, and generating first through fourth control signals, respectively. The adder receives the first through fourth control signals, and generates a frequency control signal. The oscillator circuit receives the frequency control signal, generates the first through fourth clock signals.


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