The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 07, 2017
Filed:
Oct. 28, 2013
Applicant:
Hewlett Packard Enterprise Development Lp, Houston, TX (US);
Inventor:
Frederick Perner, Palo Alto, CA (US);
Assignee:
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 5/02 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G11C 5/025 (2013.01); G11C 5/147 (2013.01); G11C 13/0023 (2013.01); G11C 13/0069 (2013.01); G11C 13/0007 (2013.01);
Abstract
In one example, a system includes a multi-plane memory array with shared crossbars and memory elements accessed through the shared crossbars and support circuitry. The support circuitry includes a bias multiplexer to determine an orientation of a target memory element in the multi-plane memory array and output voltage biases with a polarity based on the orientation of the target memory element. Methods for generating and applying geometry dependent voltage biases are also provided.