The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2017

Filed:

Apr. 07, 2015
Applicant:

Lenovo Enterprise Solutions (Singapore) Pte. Ltd., Singapore, SG;

Inventors:

Michael DeCesaris, Carrboro, NC (US);

Luke D. Remis, Raleigh, NC (US);

Brian C. Totten, Durham, NC (US);

John K. Whetzel, Holly Springs, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4027 (2013.01); G06F 13/4221 (2013.01);
Abstract

A method includes performing operations on a compute node including a plurality of processors each having a local PCI processing element and a local processor interconnect, wherein the local processor interconnect of each processor is connected to the local processor interconnect of at least one other processor. The method further includes identifying a PCI device that is directly attached to the local PCI processing element of a first one of the processors and positioned in an upstream airflow direction from the first processor. The operating system monitors the PCI device and, in response to determining that the PCI device is performing a power-intensive operation, directs operations away from the first processor to a second one of the processors, wherein the local processor interconnect of the second processor is directly connected to the processor interconnect of the first processor.


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