The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2017
Filed:
Sep. 15, 2014
Applicant:
Altera Corporation, San Jose, CA (US);
Inventor:
Hartvig Ekner, Holte, DK;
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 13/00 (2006.01); G06F 13/36 (2006.01); G01R 31/08 (2006.01); H04L 12/50 (2006.01); H04L 12/28 (2006.01); H04L 12/66 (2006.01); H04L 12/947 (2013.01); H04L 12/775 (2013.01); H04L 12/933 (2013.01); G06F 13/38 (2006.01); H04L 12/861 (2013.01); H04L 12/937 (2013.01); H04L 12/935 (2013.01); H04L 12/931 (2013.01); H04L 12/939 (2013.01);
U.S. Cl.
CPC ...
H04L 49/25 (2013.01); G06F 13/38 (2013.01); H04L 45/583 (2013.01); H04L 49/15 (2013.01); H04L 49/90 (2013.01); H04L 49/1523 (2013.01); H04L 49/1546 (2013.01); H04L 49/254 (2013.01); H04L 49/3027 (2013.01); H04L 49/45 (2013.01); H04L 49/557 (2013.01);
Abstract
A novel and efficient method is described that creates a monolithic high capacity Packet Engine (PE) by connecting N lower capacity Packet Engines (PEs) via a novel Chip-to-Chip (C2C) interface. The C2C interface is used to perform functions, such as memory bit slicing and to communicate shared information, and enqueue/dequeue operations between individual PEs.