The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2017
Filed:
Jun. 27, 2016
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Mohamed N. Elzeftawi, San Jose, CA (US);
Hongtao Zhang, San Jose, CA (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/06 (2006.01); H04B 1/10 (2006.01); H03G 3/30 (2006.01); H04L 25/03 (2006.01); H03B 5/36 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03019 (2013.01); H03G 3/3036 (2013.01); H04B 1/10 (2013.01); H03B 5/06 (2013.01); H03B 5/366 (2013.01); H03B 2200/005 (2013.01); H03B 2200/0062 (2013.01);
Abstract
A continuous time linear equalizer comprises an input of a first equalizer path configured to receive a first differential input signal; an input of a second equalizer path configured to receive a second differential input signal; a first programmable load capacitor coupled to an output of the first equalizer path; a second programmable load capacitor coupled to an output of the second equalizer path; and a programmable source capacitor coupled between the first equalizer path and the second equalizer path.