The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Sep. 15, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Chika Tanaka, Yokohama, JP;

Keiji Ikeda, Kawasaki, JP;

Yoshihiro Ueda, Yokohama, JP;

Toshinori Numata, Kamakura, JP;

Tsutomu Tezuka, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/24 (2006.01); H01L 27/108 (2006.01); G11C 11/4091 (2006.01); H01L 29/24 (2006.01); H01L 29/78 (2006.01); G11C 11/408 (2006.01); H01L 27/06 (2006.01); G11C 11/404 (2006.01); G11C 11/405 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10897 (2013.01); G11C 11/408 (2013.01); G11C 11/4091 (2013.01); H01L 27/0688 (2013.01); H01L 27/1082 (2013.01); H01L 27/10808 (2013.01); H01L 29/24 (2013.01); H01L 29/7827 (2013.01); G11C 11/404 (2013.01); G11C 11/405 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a sense amplifier on a semiconductor substrate, a memory cell array including a memory cell above the sense amplifier, the memory cell including a capacitor and a first transistor, the capacitor including a first electrode and a second electrode, the first transistor including a first current path and a first control electrode controlling an on/off of the first current path, the first current path including a first terminal and a second terminal, the first terminal being electrically connected to the first electrode, and a first conductive line electrically connected to the second terminal and extending along an upper surface of the semiconductor substrate in a first direction, the first conductive line being electrically connected to the sense amplifier.


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