The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Feb. 15, 2016
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Ulrich Wachter, Regensburg, DE;

Dominic Maier, Pleystein, DE;

Thomas Kilger, Regenstauf, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 24/96 (2013.01); H01L 21/561 (2013.01); H01L 21/76838 (2013.01); H01L 23/31 (2013.01); H01L 23/3114 (2013.01); H01L 23/48 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/19 (2013.01); H01L 24/85 (2013.01); H01L 21/568 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/48 (2013.01); H01L 2224/02317 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/0347 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03828 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05553 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/1132 (2013.01); H01L 2224/1134 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/96 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/10161 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19107 (2013.01);
Abstract

Integrated circuits are packaged by placing a plurality of semiconductor dies on a support substrate, each one of the semiconductor dies having a plurality of terminals at a side facing the support substrate and covering the semiconductor dies with a molding compound to form a molded structure. The support substrate is then removed from the molded structure to expose the side of the semiconductor dies with the terminals, and a metal redistribution layer is formed on the molded structure and in direct contact with the terminals of the semiconductor dies and the molding compound. The redistribution layer is formed without first forming a dielectric layer on a side of the molded structure with the terminals of the semiconductor dies. A corresponding molded substrate and individual molded semiconductor packages are also disclosed.


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