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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9806009 B1

PDFFull Text
Date of Patent:
Oct. 31, 2017

Filed:

Nov. 28, 2014

Semiconductor device and power converter using the same

Applicant:

Hitachi Automotive Systems, Ltd., Hitachinaka-shi, Ibaraki, JP;

Inventors:

Shinichi Fujino, Hitachinaka, JP;

Takashi Kume, Hitachinaka, JP;

Assignee:

Hitachi Automotive Systems, Ltd., Hitachinaka-shi, JP;

Attorney:

Crowell & Moring LLP

Primary Examiner:

Nitin Parekh

Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/48 (2006.01); H02M 7/48 (2007.01); H01L 23/00 (2006.01); H02M 7/00 (2006.01); H01L 21/48 (2006.01); H01L 21/54 (2006.01); H02M 7/44 (2006.01); H01L 23/492 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 21/486 (2013.01); H01L 21/54 (2013.01); H01L 23/48 (2013.01); H01L 23/49517 (2013.01); H01L 23/49537 (2013.01); H01L 23/49541 (2013.01); H01L 23/49568 (2013.01); H01L 24/33 (2013.01); H01L 24/36 (2013.01); H01L 24/40 (2013.01); H02M 7/003 (2013.01); H02M 7/44 (2013.01); H02M 7/48 (2013.01); H01L 23/492 (2013.01); H01L 23/49524 (2013.01); H01L 2224/40137 (2013.01); H01L 2224/40247 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73221 (2013.01); H01L 2224/73263 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/13055 (2013.01);
Abstract

To suppress a temperature rise of a chip accompanying a production of large output by a power converter, and to reduce a size of the power converter. A power semiconductor device includes: a first power semiconductor element to configure an upper arm of an inverter circuit; a second power semiconductor element to configure a lower arm of the inverter circuit; a first lead frame to transmit power to the first power semiconductor element; a second lead frame to transmit power to the second power semiconductor element; a first gate lead frame to transmit a control signal to the first power semiconductor element; and a sealing member to seal the first power semiconductor element, the second power semiconductor element, the first lead frame, the second lead frame, and the first gate lead frame. In the power semiconductor device, a through-hole is formed in the sealing member, and a part of the first gate lead frame and a part of the second lead frame are exposed to an inner peripheral surface of the through-hole.

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