The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Aug. 01, 2013
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Shawn X. Arnold, San Jose, CA (US);

Jeffrey M. Thoma, Mountain View, CA (US);

Connor R. Duke, Sunnyvale, CA (US);

Yanchu Xu, San Jose, CA (US);

Nelson J. Kottke, Cupertino, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/005 (2006.01); H01G 4/01 (2006.01); H05K 1/18 (2006.01); H05K 13/04 (2006.01); B23K 26/22 (2006.01); H05K 3/34 (2006.01); H01G 4/40 (2006.01); H01G 2/06 (2006.01); H01G 2/10 (2006.01); H01G 4/224 (2006.01); H01G 4/228 (2006.01);
U.S. Cl.
CPC ...
H01G 4/01 (2013.01); B23K 26/22 (2013.01); H01G 2/06 (2013.01); H01G 2/10 (2013.01); H01G 4/224 (2013.01); H01G 4/228 (2013.01); H01G 4/40 (2013.01); H05K 1/181 (2013.01); H05K 3/3442 (2013.01); H05K 13/0465 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10636 (2013.01); H05K 2201/10962 (2013.01); H05K 2201/2045 (2013.01); Y02P 70/611 (2015.11); Y02P 70/613 (2015.11);
Abstract

The described embodiments relate generally to printed circuit boards (PCBs) including a capacitor and more specifically to designs for mechanically isolating the capacitor from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Conductive features can be mechanically and electrically coupled to electrodes located on two ends of the capacitor. The conductive features can be placed in corners where the amplitude of vibrations created by the piezoelectric forces is relatively small. The conductive features can then be soldered to a land pattern on the PCB to form a mechanical and electrical connection while reducing an amount of vibrational energy transferred from the capacitor to the PCB.


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