The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Aug. 24, 2015
Applicants:

Toshiba Memory Corporation, Minato-ku, JP;

Toshiba Information Systems (Japan) Corporation, Kawasaki, JP;

Inventors:

Hiroaki Nakano, Kawaguchi, JP;

Mami Kakoi, Yokohama, JP;

Shigeki Nagasaka, Kawasaki, JP;

Toshiyuki Kouchi, Kawasaki, JP;

Itaru Yamaguchi, Yokohama, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/32 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
G11C 16/32 (2013.01); G11C 5/025 (2013.01); G11C 5/063 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a plurality of stacked first chips and a second chip. The second chip outputs a first signal to the first chips. The first chip outputs status information at timing based on the received first signal. The first chip shifts the received first signal and outputs the shifted first signal to the first chip of a next stage in synchronization with the first clock signal. The second chip receives a plurality of status information output in a serial manner from the first chips.


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