The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Sep. 05, 2014
Applicant:

Altera Corporation, San Jose, CA (US);

Inventor:

Pohrong Rita Chu, Saratoga, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 9/30 (2006.01); G06F 17/50 (2006.01); H03K 19/177 (2006.01); G06F 3/06 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3004 (2013.01); G06F 3/0604 (2013.01); G06F 3/0655 (2013.01); G06F 3/0683 (2013.01); G06F 9/30105 (2013.01); G06F 9/38 (2013.01); G06F 17/5054 (2013.01); G06F 17/5081 (2013.01); H03K 19/177 (2013.01); G06F 2003/0697 (2013.01);
Abstract

An integrated circuit may have processing and storage circuits that perform read-modify-write operations on a wide data path. A CAD tool may partition the wide data path into data path subsets based on the width of the wide data path, the characteristics of the processing and storage circuits, and various constraints such as resource constraints and timing constraints. The CAD tool may also instantiate corresponding pipelined circuitry. The pipelined circuitry may be arranged in slices with cascaded processing and storage circuits. Each processing and storage circuit in a slice may perform a read-modify-write operation based on the corresponding data path subset and any prior result produced by other processing and storage circuits.


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