The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Sep. 21, 2011
Applicants:

Anil Nagpal, Andhra Pradesh, IN;

Ataur Rahman, Andhra Pradesh, IN;

Inventors:

Anil Nagpal, Andhra Pradesh, IN;

Ataur Rahman, Andhra Pradesh, IN;

Assignee:

Honeywell International Inc., Morristown, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 19/04 (2006.01); G01R 19/30 (2006.01); G01R 19/02 (2006.01); G01R 25/00 (2006.01); G01R 1/067 (2006.01); G01R 1/07 (2006.01);
U.S. Cl.
CPC ...
G01R 19/04 (2013.01); G01R 19/02 (2013.01); G01R 25/005 (2013.01); G01R 1/06777 (2013.01); G01R 1/06788 (2013.01); G01R 1/07 (2013.01);
Abstract

A high voltage phasing voltmeter comprises first and second probes. Each probe comprises an electrode for contacting a high voltage electrical conductor. The electrodes are connected in series with a resistor. A meter comprises a housing enclosing an electrical circuit for measuring true rms voltage. The electrical circuit comprises an input circuit for connection to the first and second probes and developing a scaled voltage representing measured voltage across the electrodes. A converter circuit converts the scaled voltage to a DC signal representing true rms value of the measured voltage. A peak hold circuit is connected to the converter circuit to hold a peak value of the true rms value. A display is connected to the peak hold circuit for displaying the peak value of the true rms value.


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