The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2017

Filed:

Jun. 15, 2015
Applicant:

Cooper Technologies Company, Houston, TX (US);

Inventors:

Gary Bruce Baker, Sherwood, OR (US);

Nicholas Taylor Begley, Portland, OR (US);

Assignee:

COOPER TECHNOLOGIES COMPANY, Houston, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B60L 11/02 (2006.01); B60L 11/18 (2006.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
B60L 11/02 (2013.01); B60L 11/18 (2013.01); H02M 3/1582 (2013.01); H02M 3/1584 (2013.01); H02M 2003/1586 (2013.01);
Abstract

A circuit, system, and method for a multi-phase bidirectional DC/DC power converter includes a plurality of single phase DC/DC power converter circuits coupled in electrical parallel. A converter controller includes a compensator and a saturation limit function module. The compensator is configured to generate a control signal based on a current command signal and an actual current signal. The saturation limit function module is configured to determine a saturation limit for the compensator while the compensator is in a disabled state. The converter controller is configured to disable one or more of the plurality of power converter circuits, match the saturation limit values of the compensator to current operating values when one or more of the plurality of single phase DC/DC power converter circuits is disabled, and re-enable the one or more of the plurality of power converter circuits using the matched saturation limit values to limit transient current stress as any disabled phases and compensators are re-enabled.


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