The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2017
Filed:
Dec. 11, 2015
Applicant:
Allen-vanguard Corporation, Ottawa, CA;
Inventors:
Assignee:
Allen-Vanguard Corporation, Ottawa, CA;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 1/38 (2015.01); G06F 15/16 (2006.01); H04L 27/26 (2006.01); H04B 1/06 (2006.01); H04B 1/04 (2006.01); H04B 1/16 (2006.01); H04B 7/08 (2006.01); H04B 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 27/2647 (2013.01); H04B 1/006 (2013.01); H04B 1/0483 (2013.01); H04B 1/06 (2013.01); H04B 1/16 (2013.01); H04B 1/38 (2013.01); H04B 7/0817 (2013.01);
Abstract
A wideband signal processing receiver system including an interface for connecting to an analog to digital converter (ADC) of a broader signal chain lineup, wherein the interface receives digital data from the ADC, and a field programmable gate array (FPGA) and associated configuration for converting the digital data into two digital signal paths. The two digital signal paths include a frequency domain path and an optionally decimated time domain path. A memory and/or high speed bus stores or transfers high speed bus/link data from the frequency domain path and the time domain path.