The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Mar. 30, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Robert L. Franch, Wappingers Falls, NY (US);

Eren Kursun, Yorktown Heights, NY (US);

Liang-Teck Pang, White Plains, NY (US);

Phillip J. Restle, Katonah, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/08 (2006.01); H03K 5/05 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
H03K 5/05 (2013.01); G06F 1/08 (2013.01); G06F 1/32 (2013.01);
Abstract

A method for providing a stitchable clock mesh, a dual operation mode system, and a method for providing a master clock stratum are, in turn, provided for a 3D chip stack having two or more strata. The method for providing a stitchable clock mesh includes providing, by at least one clock mesh disposed on each stratum and having multiple sectors, a global clock signal to various chip locations. The method further includes collecting, by mesh data sensors on each stratum, mesh data for the at least one mesh. The mesh data includes measured functional data and measured performance data for a current system configuration. The method also includes selectively performing, by joining circuitry, a segmentation operation or a joining operation on the least one mesh or one or more portions thereof responsive to the mesh data and the current system configuration selectable from a plurality of system target configurations.


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