The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Mar. 15, 2016
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Inventors:

Pengju Zhang, Beijing, CN;

Zhilong Peng, Beijing, CN;

Hao Wang, Beijing, CN;

Mengxiao Pan, Beijing, CN;

Huanping Liu, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42384 (2013.01); H01L 27/124 (2013.01); H01L 27/1259 (2013.01); H01L 29/41733 (2013.01);
Abstract

A method of manufacturing the TFT array substrate includes steps of: forming a first electrically conductive layer on the substrate, the first electrically conductive layer including a first electrically conductive pattern and a first signal line connected electrically to the first electrically conductive pattern located in a pixel region, and a first lead wire connected electrically to the first signal line; forming an insulation layer on the substrate formed with the first electrically conductive layer, the insulation layer including a first via-hole through which the first lead wire is exposed; and forming a second electrically conductive film on the substrate formed with the insulation layer, the second electrically conductive film being connected electrically to the first lead wire through the first via-hole in the insulation layer.


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