The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Jun. 07, 2017
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Dariusz Golda, Redwood City, CA (US);

Andreas Bibl, Los Altos, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 21/683 (2006.01); B81C 99/00 (2010.01); H01L 21/762 (2006.01); H01L 21/266 (2006.01); H01L 23/00 (2006.01); H02N 13/00 (2006.01); H01L 21/308 (2006.01); B32B 38/18 (2006.01); H01L 29/872 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/40 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6833 (2013.01); B32B 38/18 (2013.01); B81C 99/002 (2013.01); H01L 21/266 (2013.01); H01L 21/3083 (2013.01); H01L 21/76264 (2013.01); H01L 24/75 (2013.01); H01L 29/06 (2013.01); H01L 29/0619 (2013.01); H01L 29/0692 (2013.01); H02N 13/00 (2013.01); H01L 29/0696 (2013.01); H01L 29/407 (2013.01); H01L 29/66143 (2013.01); H01L 29/66348 (2013.01); H01L 29/7806 (2013.01); H01L 29/7813 (2013.01); H01L 29/872 (2013.01); H01L 29/8725 (2013.01); H01L 2224/7598 (2013.01); H01L 2924/1461 (2013.01); Y10T 156/17 (2015.01);
Abstract

A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described. In an embodiment, a compliant bipolar micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include first and second silicon interconnects, and first and second arrays of silicon electrodes electrically connected with the first and second silicon interconnects and deflectable into one or more cavities between the base substrate and the silicon electrodes.


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