The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Oct. 20, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Kwang-Jin Lee, Hwaseong-si, KR;

Assignee:

Samsung Electronic Co., Ltd., Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 (2006.01); G11C 13/00 (2006.01); G11C 5/04 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 5/04 (2013.01); G11C 13/004 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); G11C 13/0097 (2013.01);
Abstract

A nonvolatile memory module including a plurality of memory chips and a module controller on a printed circuit board (PCB) may be provided. Each of the plurality of memory chips may include a plurality of nonvolatile memory cell array layers stacked on a substrate in a three dimensional structure. The module controller may control operations of the plurality of memory chips. The module controller may operate each of the plurality of nonvolatile memory cell array layers included in each of the plurality of memory chips in one of a memory mode, in which a corresponding nonvolatile memory cell array layer is used as a working memory area that temporarily stores data for an operation of the nonvolatile memory module, and a storage mode, in which the corresponding nonvolatile memory cell array layer is used as a storage area that preserves data.


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