The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2017
Filed:
Aug. 27, 2015
Address scheduling methods for non-volatile memory devices with three-dimensional memory cell arrays
Chi Weon Yoon, Seoul, KR;
Dong Hyuk Chae, Seoul, KR;
Sang-wan Nam, Hwaseong-si, KR;
Jung-yun Yun, Seoul, KR;
Chi Weon Yoon, Seoul, KR;
Dong Hyuk Chae, Seoul, KR;
Sang-Wan Nam, Hwaseong-si, KR;
Jung-Yun Yun, Seoul, KR;
SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do, KR;
Abstract
At least one address scheduling method includes selecting a first bit line, selecting a first string connected to the first bit line, performing address scheduling on N pages of each of multi-level cells in the first string sequentially from a bottom word line to a top word line, and after completing the address scheduling on all word lines in the first string, performing address scheduling on second to k-th strings sequentially in the same manner as performed with respect to the first string, where 'k' is 2 or a natural number greater than 2.