The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Apr. 08, 2016
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Guangdong, CN;

Inventor:

Shimin Ge, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1343 (2006.01); G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13439 (2013.01); G02F 1/1368 (2013.01); G02F 1/133345 (2013.01); G02F 1/136227 (2013.01); H01L 29/7869 (2013.01); H01L 29/78606 (2013.01); G02F 2001/134372 (2013.01); G02F 2001/136236 (2013.01); G02F 2201/121 (2013.01); G02F 2202/10 (2013.01); G02F 2202/16 (2013.01);
Abstract

An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a glass substrate provided with a gate electrode thereon; a first insulation layer; a semiconductor layer having a channel region and a common electrode region to form a channel semiconductor layer on the channel region of the semiconductor layer, and form a common electrode layer on the common electrode region of the semiconductor layer by doping semiconductor thereon; and a second insulation layer provided with a first through hole and a second through hole therein.


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