The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2017
Filed:
Jan. 19, 2015
Allegro Microsystems, Llc, Worcester, MA (US);
Christian Feucht, Annecy, FR;
Thomas J. Kovalcik, Barrington, NH (US);
Allegro MicroSystems, LLC, Worcester, MA (US);
Abstract
Apparatuses, systems, and methods that provide a delayed output signal with reduced sampling error are described. Embodiments include a clock circuit that generates a sample clock signal having a predetermined sample clock period. A sampling circuit may generate samples of a received signal during each sample clock period. An interpolation circuit may estimate a value of the received signal at times between the samples of the received signal based on at least a first sample and a second sample of the received signal. The interpolation circuit may estimate a time that the received signal crosses a threshold, and determine a time delta between the first sample and the estimated time that the received signal crosses the threshold. A delay circuit to generate a time delay substantially equal to the time delta is also included. An output signal changes state after the generated time delay.