The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Mar. 03, 2016
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Yue Yu, Johns Creek, GA (US);

Craig DeSimone, Dacula, GA (US);

Al Xuefeng Fang, Suwanee, GA (US);

Yanbo Wang, Duluth, GA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 25/02 (2006.01); G11C 11/4094 (2006.01); G11C 11/4096 (2006.01); G11C 11/4093 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
H04L 25/0278 (2013.01); G11C 11/4093 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01); G06F 13/4086 (2013.01);
Abstract

An apparatus comprising a plurality of driver circuits and a plurality of control registers. The plurality of driver circuits may be configured to modify a memory signal that transfers read data across a read line to a memory controller. The plurality of control registers may be configured to enable one or more of the driver circuits. A pull up strength and a pull down strength of the memory signal may be configured in response to how many of the plurality of driver circuits are enabled. The plurality of driver circuits implement an asymmetric pull up and pull down of the memory signal.


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