The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Jun. 29, 2016
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventor:

Alan Fiedler, Mountain View, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/15 (2006.01); H03L 7/07 (2006.01); H03L 7/093 (2006.01); H03L 7/081 (2006.01);
U.S. Cl.
CPC ...
H03L 7/07 (2013.01); H03K 5/1508 (2013.01); H03L 7/0812 (2013.01); H03L 7/093 (2013.01);
Abstract

Multiple, distributed, clock generating delay-locked loop (DLL) elements are interconnected/coupled in such a way as to reduce the amount of phase error present in the clocks output by these DLL elements. A plurality of DLL elements are interconnected/coupled such that a root input clock is successively relayed down a series of DLL elements. The output clocks from each of these DLL elements are interconnected/coupled to phase-corresponding output clocks from DLL elements in the series. This reduces the amount of phase error on these output clocks when compared to DLL elements that do not have outputs coupled to each other.


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