The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Jan. 29, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Takahito Nishimura, Kuwana, JP;

Yoshihisa Kawamura, Yokkaichi, JP;

Kazuhiro Takahata, Kuwana, JP;

Ikuo Yoneda, Yokkaichi, JP;

Yoshiharu Ono, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/033 (2006.01); G03F 7/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0334 (2013.01); G03F 7/0002 (2013.01);
Abstract

According to one embodiment, a device substrate includes a multilayer film that includes a film constituting a device element and is disposed on a substrate. A main face on which the device element is disposed includes a patterning region on which a resist is to be applied during an imprint process, and a bevel region provided as a region from a peripheral edge portion of the patterning region to an end portion of the device substrate. The bevel region includes a region where an upper surface of the bevel region becomes lower toward the end portion of the device substrate relative to an upper surface of the patterning region. The upper surface of the bevel region has an inclination angle of 10° or more and 90° or less with respect to the upper surface of the patterning region, at a boundary between the patterning region and the bevel region.


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