The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9793102 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 17, 2017

Filed:

Mar. 11, 2015
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Kazuyuki Miura, Mie, JP;

Kensuke Takahashi, Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/67 (2006.01); H01L 21/677 (2006.01);
U.S. Cl.
CPC ...
H01L 21/00 (2013.01); H01L 21/67253 (2013.01); H01L 21/67745 (2013.01); H01L 21/67754 (2013.01); Y02P 90/28 (2015.11);
Abstract

In one embodiment, a semiconductor manufacturing apparatus includes a stage provided in a chamber, and a conveying module configured to convey a plurality of wafers into the chamber and to set the plurality of wafers on the stage. The apparatus further includes a controller configured to divide treatment time for simultaneously treating the plurality of wafers on the stage into first to K-th treatment periods where K is an integer of two or more, and to change positions of one or more of the plurality of wafers on the stage by the conveying module according to the treatment periods.


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Miura, Kazuyuki. (2017). Semiconductor manufacturing apparatus and semiconductor manufacturing method (U.S. Patent No. 9793102). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9793102

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