The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2017
Filed:
Oct. 31, 2013
Hewlett Packard Enterprise Development Lp, Houston, TX (US);
Frederick Perner, Palo Alto, CA (US);
Kwangmyoung Rho, Icheon, KR;
Jeong Hwan Kim, Icheon, KR;
Sangmin Hwang, Icheon, KR;
Jinwon Park, Icheon, KR;
Jae Yun Yi, Icheon, KR;
Jae Yeon Lee, Icheon, KR;
Sung Won Chung, Icheon, KR;
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Abstract
In one example, a three dimensional resistive memory architecture includes adjacent memory tiles with each tile including a multilevel resistive crossbar array and at least one decoder. The multilevel crossbar array includes layers of row crossbars, layers of column crossbars, and layers of resistive memory elements interposed between cross points of the row crossbars and the column crossbars, in which at least one layer of crossbars extends from a first tile through an adjacent tile and is used to address resistive memory elements in the adjacent tile. The at least one decoder underlies the multilevel resistive crossbar array and includes an address matrix comprising digital lines and analog lines, in which the digital lines select which crossbars are connected to the analog lines.