Process, voltage, and temperature tracking sram retention voltage regulator

Abstract

Systems, apparatuses, and methods for tracking a retention voltage are disclosed. In one embodiment, a circuit is utilized for generating a standby voltage for a static random-access memory (SRAM) array. The circuit tracks the leakage current of the bitcells of the SRAM array as the leakage current varies over temperature. The circuit mirrors this leakage current and tracks the higher threshold voltage of a p-channel transistor or an n-channel transistor, with the p-channel and n-channel transistors matching the transistors in the bitcells of the SRAM array. The circuit includes a voltage regulator to supply power to the SRAM array at a supply voltage proportional to the higher threshold voltage tracked. Setting a supply voltage of the SRAM array based on threshold voltages and leakage current may reduce power consumption as compared to using a supply voltage based on a worst case operating conditions assumption for the SRAM array.