The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Dec. 27, 2013
Applicant:

Artesyn Embedded Computing, Inc., Tempe, AZ (US);

Inventors:

Robert Charles Tufford, Chandler, AZ (US);

Liu Jiang, Shenzhen, CN;

Pasi Jukka Petteri Vaananen, Waltham, MA (US);

Martin Peter John Cornes, Phoenix, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/16 (2006.01); H05K 1/14 (2006.01); G06F 1/18 (2006.01); G06F 11/18 (2006.01); G05B 19/05 (2006.01); G05B 19/048 (2006.01);
U.S. Cl.
CPC ...
G06F 1/189 (2013.01); G05B 19/048 (2013.01); G05B 19/05 (2013.01); G06F 11/181 (2013.01); G06F 11/182 (2013.01);
Abstract

A dual redundant computer safety relay box system includes first and second fail-safe computing systems (FSCs) individually mounted to first and second printed circuit boards. Each FSC includes two computing modules (CPUs) designated as a first CPU and a second CPU. The first and second FSC's are both connected to a safety relay box. The printed circuit boards are isolable from each other permitting maintenance on one of the printed circuit boards while operation of the FSC of the other printed circuit board is maintained. In each FSC a health signal generated from the first and second printed circuit boards of the first and second CPUs defines a multi-level dynamic pulse signal. Presence of the dynamic pulse signal produces an output identified as each of a first and a second healthy indication signal from each of the CPUs of one of the first or second FSCs.


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