The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2017

Filed:

Dec. 05, 2011
Applicants:

Rajan Goyal, Saratoga, CA (US);

Muhammad Raghib Hussain, San Jose, CA (US);

Trent Parker, San Jose, CA (US);

Inventors:

Rajan Goyal, Saratoga, CA (US);

Muhammad Raghib Hussain, San Jose, CA (US);

Trent Parker, San Jose, CA (US);

Assignee:

Cavium, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/30 (2006.01); H04L 29/06 (2006.01); G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
H04L 63/1408 (2013.01); G06F 9/444 (2013.01); G06F 17/30958 (2013.01); G06F 17/30985 (2013.01);
Abstract

In a method and apparatus for analyzing nodes of a Deterministic Finite Automata (DFA), an accessibility ranking, based on a DFA graph geometrical configuration, may be determined in order to determine cacheable portions of the DFA graph in order to reduce the number of external memory accesses. A walker process may be configured to walk the graph in a graph cache as well as main memory. The graph may be generated in a manner allowing each arc to include information if the node it is pointing to is stored in the graph cache or in main memory. The walker may use this information to determine whether or not to access the next arc in the graph cache or in main memory.


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