The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2017
Filed:
Dec. 13, 2013
Itm Semiconductor Co., Ltd, Cheongwon-gun, Chungcheongbuk-do, KR;
Hyeok Hwi Na, Cheongju-si, KR;
Ho Suk Hwang, Gunpo-si, KR;
Young Seok Kim, Cheongju-si, KR;
Sung Beum Park, Guri-si, KR;
Sang Hoon Ahn, Cheongju-si, KR;
Tae Hwan Jung, Chungcheongbuk-do, KR;
Seung Uk Park, Cheonan-si, KR;
Jae Ku Park, Chungcheongbuk-do, KR;
Hyun Mok Cho, Cheongju-si, KR;
Min Ho Park, Chungcheongbuk-do, KR;
Young Geun Yoon, Chungcheongbuk-do, KR;
Seong Ho Ju, Daejeon, KR;
Young Nam Ji, Cheongju-si, KR;
Myoung Ki Moon, Chungcheongbuk-do, KR;
Hyun Suck Lee, Jecheon-si, KR;
Ji Young Park, Busan, KR;
ITM SEMICONDUCTOR CO., LTD, Oksan-myeon, Cheongwon-gun, KR;
Abstract
Disclosed is a battery protection module package (PMP). The battery PMP according to an embodiment of the present invention includes a lead frame provided with a plurality of external terminals thereon, a printed circuit board stacked on the lead frame, and a plurality of internal terminals, a protection integrated chip (IC), a field effect transistor (FET), resistors, and capacitors disposed on the printed circuit board and electrically connected to each other, wherein the resistors and the capacitors are mounted on a pattern of the printed circuit board using surface mount technology (SMT), and wherein the plurality of internal terminals are electrically connected to the plurality of external terminals.