The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2017

Filed:

Aug. 15, 2016
Applicant:

Dpix, Llc, Colorado Springs, CO (US);

Inventors:

Shawn Michael O'Rourke, Colorado Springs, CO (US);

Byung-Kyu Park, Colorado Springs, CO (US);

Robert Rodriquez, Colorado Springs, CO (US);

Assignee:

dpiX, LLC, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/42 (2006.01); H01L 51/44 (2006.01); H01L 27/30 (2006.01); H01L 27/144 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
H01L 51/4253 (2013.01); H01L 27/1446 (2013.01); H01L 27/307 (2013.01); H01L 51/0004 (2013.01); H01L 51/0022 (2013.01); H01L 51/441 (2013.01); H01L 51/442 (2013.01); H01L 51/448 (2013.01); Y02E 10/549 (2013.01);
Abstract

A method of manufacturing an image sensor device includes providing a metalized thin film transistor layer on a glass substrate; forming an inter-layer dielectric layer on the metalized thin film transistor layer; forming a via through the inter-layer dielectric layer; forming a metal layer the inter-layer dielectric and within the inter-layer dielectric layer via for contacting the metalized thin film transistor layer; forming a bank layer on the metal layer and the inter-layer dielectric layer; forming a via through the bank layer; forming an electron transport layer on the bank layer and within the bank layer via for contacting an upper surface of the metal layer; forming a bulk heterojunction layer on the electron transport layer; forming a hole transport layer on the bulk heterojunction layer; and forming a top contact layer on the hole transport layer.


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