The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2017

Filed:

Sep. 30, 2016
Applicant:

Seoul Semiconductor Co., Ltd., Ansan-si, KR;

Inventors:

Jung Hwa Jung, Ansan-si, KR;

Hee Tak Oh, Ansan-si, KR;

Do Hyung Kim, Ansan-si, KR;

You Jin Kwon, Ansan-si, KR;

Oh Sug Kim, Ansan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 21/00 (2006.01); H01L 33/62 (2010.01); H01L 25/075 (2006.01); H01L 33/64 (2010.01); H01L 25/16 (2006.01); H01L 33/48 (2010.01);
U.S. Cl.
CPC ...
H01L 33/62 (2013.01); H01L 25/0753 (2013.01); H01L 33/48 (2013.01); H01L 33/642 (2013.01); H01L 25/167 (2013.01); H01L 33/486 (2013.01); H01L 2224/48227 (2013.01);
Abstract

A light-emitting diode package includes a package body. The package body includes an upper insulation substrate including upper conductive patterns, a lower insulation substrate including lower conductive patterns, and middle conductive patterns disposed between the upper insulation substrate and the lower insulation substrate. The package body also includes an upper via disposed in the upper insulation substrate, a lower via disposed in the lower insulation substrate, the upper via and the lower via not overlaid with each other.


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