The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2017

Filed:

Oct. 05, 2015
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsug-shi, Kanagawa-ken, JP;

Inventor:

Toshihiko Saito, Kanagawa, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/24 (2006.01); H01L 27/108 (2006.01); G11C 11/404 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 49/02 (2006.01); G11C 11/401 (2006.01); G11C 11/4096 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1082 (2013.01); G11C 11/401 (2013.01); G11C 11/404 (2013.01); G11C 11/4096 (2013.01); H01L 21/84 (2013.01); H01L 27/108 (2013.01); H01L 27/1203 (2013.01); H01L 28/40 (2013.01); H01L 28/60 (2013.01); H01L 29/7869 (2013.01); H01L 27/1085 (2013.01); H01L 27/10852 (2013.01); H01L 27/10873 (2013.01);
Abstract

To increase a storage capacity of a memory module per unit area, and to provide a memory module with low power consumption, a transistor formed using an oxide semiconductor film, a silicon carbide film, a gallium nitride film, or the like, which is highly purified and has a wide band gap of 2.5 eV or higher is used for a DRAM, so that a retention period of potentials in a capacitor can be extended. Further, a memory cell has n capacitors with different capacitances and the n capacitors are each connected to a corresponding one of n data lines, so that a variety of the storage capacitances can be obtained and multilevel data can be stored. The capacitors may be stacked for reducing the area of the memory cell.


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