The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2017

Filed:

Apr. 15, 2016
Applicant:

Panasonic Liquid Crystal Display Co., Ltd., Hyogo, JP;

Inventors:

Hideyuki Nakanishi, Hyogo, JP;

Junichi Maruyama, Hyogo, JP;

Toshikazu Koudo, Hyogo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/20 (2006.01); G02F 1/1368 (2006.01); G09G 5/00 (2006.01); G09G 5/395 (2006.01);
U.S. Cl.
CPC ...
G09G 3/2007 (2013.01); G02F 1/1368 (2013.01); G09G 3/2092 (2013.01); G09G 3/3614 (2013.01); G09G 3/3648 (2013.01); G09G 3/3677 (2013.01); G09G 3/3688 (2013.01); G09G 5/001 (2013.01); G09G 5/395 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/027 (2013.01); G09G 2310/0224 (2013.01); G09G 2310/0227 (2013.01); G09G 2310/08 (2013.01); G09G 2320/103 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0435 (2013.01); G09G 2360/18 (2013.01);
Abstract

A display device including a display portion, a source driver, a gate driver and a controller, wherein the controller is configured to control the source driver and the gate driver based on a control mode for displaying the frame image on the display portion, in a basic control mode, the controller is configured to display a frame image on the display portion by causing the gate driver to progressively scan gate signal lines, in a low frequency control mode, the controller is configured to determine whether a regional signal is on in a specific region corresponding to specific gate signal lines, when it is determined that the regional signal is off, the controller is configured to display a sub-frame image on the display portion by causing the gate driver to perform interlaced scanning of the gate signal lines every K lines in the first frame frequency F


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