Methods and systems for memory de-duplication

Abstract

Provided are methods and systems for de-duplicating cache lines in physical memory by detecting cache line data patterns and building a link-list between multiple physical addresses and their common data value. In this manner, the methods and systems are applied to achieve de-duplication of an on-chip cache. A cache line filter includes one table that defines the most commonly duplicated content patterns and a second table that saves pattern numbers from the first table and the physical address for she duplicated cache line. Since a cache line duplicate can be detected during a write operation, each write can involve table lookup and comparison. If there is a hit in the table, only the address is saved instead of the entire data string.