The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Jul. 26, 2016
Applicants:

Texas Instruments Incorporated, Dallas, TX (US);

Texas Instruments Deutschland Gmbh, Freising, DE;

Inventors:

Swapnil Anilkumar Tapadia, Bangalore, IN;

Bernd Schneider, Freising, DE;

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01); H02M 1/36 (2007.01);
U.S. Cl.
CPC ...
H02M 1/36 (2013.01);
Abstract

An apparatus includes: a voltage regulator that outputs a voltage responsive to an enable signal; a power managed domain coupled to the voltage regulator and including a clock generator configured to output a clock signal from the clock generator; and an always on domain. The always on domain receives the clock signal. The always on domain includes a finite state machine coupled to receive the clock signal and receiving a shutdown request signal. The finite state machine is configured to output a signal to control power to the power managed domain and to disable the clock generator, responsive to the shutdown request signal. The finite state machine receives an asynchronous wake signal, and circuitry in the always on domain is coupled to enable power to the power managed domain and to the clock generator, responsive to the asynchronous wake input signal.


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