The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Feb. 19, 2016
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Yukio Nishida, Tokyo, JP;

Tomohiro Yamashita, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01); H01L 27/11573 (2017.01); H01L 29/423 (2006.01); H01L 27/11563 (2017.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/792 (2013.01); H01L 21/28008 (2013.01); H01L 21/28282 (2013.01); H01L 27/11563 (2013.01); H01L 27/11573 (2013.01); H01L 29/0653 (2013.01); H01L 29/42344 (2013.01); H01L 29/66833 (2013.01);
Abstract

To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor substrate having an insulating film formed on a surface thereof, and then the metal film is removed in a memory cell region, whereas, in a part of a peripheral circuit region, the metal film is left. Next, a silicon film is formed over the semiconductor substrate, then the silicon film is patterned in the memory cell region, and, in the peripheral circuit region, the silicon film is left so that an outer peripheral portion of the remaining metal film is covered with the silicon film. Subsequently, in the peripheral circuit region, the silicon film, the metal film, and the insulating film are patterned for forming an insulating film portion formed of the insulating film, a metal film portion formed of the metal film, and a conductive film portion formed of the silicon film.


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