The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Dec. 10, 2015
Applicants:

Kyo-wook Lee, Goyang-si, KR;

Dong-hun Lee, Anyang-si, KR;

Hee-bum Hong, Hwaseong-si, KR;

Yong-rae Cho, Anyang-si, KR;

Inventors:

Kyo-Wook Lee, Goyang-si, KR;

Dong-Hun Lee, Anyang-si, KR;

Hee-Bum Hong, Hwaseong-si, KR;

Yong-Rae Cho, Anyang-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); H01L 29/7851 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A dual-port SRAM device includes a substrate having a field region and first to fourth active fins extending in a first direction, and a unit cell having first to eighth gate structures. The first and second gate structures are on the first, second and fourth active fins, and extend in a second direction crossing the first direction. The third and fourth gate structures are on the first, second and third active fins, and extend in the second direction. The fifth and sixth gate structures are on the third active fin, and extend in the second direction. The seventh and eighth gate structures are on the fourth active fin, and extend in the second direction. The sixth gate structure is electrically connected to the third gate structure through the first contact plug, and the seventh gate structure is electrically connected to the second gate structure through a second contact plug.


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