The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
May. 26, 2014
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Franz Gabler, Lappersdorf, DE;
Horst Theuss, Wenzenbach, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 21/78 (2006.01); H01L 23/29 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 24/48 (2013.01); H01L 21/56 (2013.01); H01L 21/78 (2013.01); H01L 23/29 (2013.01); H01L 23/3114 (2013.01); H01L 23/3135 (2013.01); H01L 23/49524 (2013.01); H01L 23/49575 (2013.01); H01L 23/49586 (2013.01); H01L 23/5389 (2013.01); H01L 24/02 (2013.01); H01L 24/18 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/18 (2013.01); H01L 2224/2518 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48472 (2013.01); H01L 2224/73263 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8392 (2013.01); H01L 2224/8592 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01);
Abstract
A method of manufacturing a molded chip package is provided which comprises arranging an electronic chip on a supporting structure; forming an isolation layer at least on portions of the electronic chip; and molding an encapsulation which covers the electronic chip and the supporting structure at least partially by using a molding material comprising a matrix material and a conductive filler material.