The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Mar. 22, 2017
Applicant:
Stmicroelectronics (Rousset) Sas, Rousset, FR;
Inventors:
Assignee:
STMicroelectronics (Rousset) SAS, Rousset, FR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/02 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/576 (2013.01); H01L 21/76838 (2013.01); H01L 27/0203 (2013.01);
Abstract
An integrated circuit includes a substrate with several functional blocks formed thereon. At least two identical functional blocks are respectively disposed at two or more different locations on the integrated circuit. Electrically inactive dummy modules in the neighborhoods and/or inside of the functional blocks are provided, wherein at least two different electrically inactive dummy modules are includes in the respective neighborhoods and/or inside of the at least two identical functional blocks.
Fornara, Pascal. (2017). Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit (U.S. Patent No. 9780045). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9780045
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile