The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Jul. 18, 2016
Applicant:
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Inventors:
Masato Oda, Yokohama, JP;
Mari Matsumoto, Kawasaki, JP;
Kosuke Tatsumura, Yokohama, JP;
Shinichi Yasuda, Setagaya, JP;
Assignee:
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/003 (2006.01); H03K 19/173 (2006.01); G11C 17/00 (2006.01); H01L 23/525 (2006.01); H03K 19/177 (2006.01); H01L 27/112 (2006.01); H03K 19/00 (2006.01); G11C 17/18 (2006.01); G11C 17/16 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5252 (2013.01); H01L 27/11206 (2013.01); H03K 19/0013 (2013.01); H03K 19/00346 (2013.01); H03K 19/1735 (2013.01); H03K 19/1737 (2013.01); H03K 19/1776 (2013.01); H03K 19/17728 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01);
Abstract
An integrated circuit according to an embodiment includes: an anti-fuse element including a first terminal and a second terminal; a fuse element including a third terminal connected to the second terminal, and a fourth terminal; a first wiring line connected to the first terminal of the anti-fuse element; and a drive circuit configured to supply a plurality of potentials to the first terminal of the anti-fuse element, the drive circuit being connected to the first wiring line, the potentials being different from each other.