The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Jun. 30, 2016
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventor:
Seok-Han Park, Hwaseong-si, KR;
Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01); G03F 7/00 (2006.01); H01L 27/108 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); G03F 7/0002 (2013.01); H01L 21/31144 (2013.01); H01L 21/32139 (2013.01); H01L 21/76816 (2013.01); H01L 27/10814 (2013.01); H01L 27/10823 (2013.01); H01L 27/10852 (2013.01); H01L 27/10876 (2013.01); H01L 27/10885 (2013.01); H01L 27/10894 (2013.01);
Abstract
In a method of forming patterns of a semiconductor device, an object layer is formed on a substrate. A plurality of guiding pillars and at least one guiding dam are formed on the object layer. A self-aligned layer including a block copolymer is formed in a space between the guiding pillars and the guiding dam, such that first blocks aligned around the guiding pillars and second blocks aligned around the guiding dam are formed. A trim pattern at least partially covering the guiding dam is formed. The first blocks are transferred in the object layer.