The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Dec. 03, 2014
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong, CN;

Inventors:

Xiaojiang Yu, Guangdong, CN;

Xin Zhang, Guangdong, CN;

Jun Xia, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G02F 1/13 (2006.01); G02F 1/133 (2006.01); G11C 19/18 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G02F 1/13 (2013.01); G02F 1/13306 (2013.01); G09G 3/36 (2013.01); G09G 3/3696 (2013.01); G11C 19/184 (2013.01); G11C 19/28 (2013.01); G09G 2300/0809 (2013.01); G09G 2310/0286 (2013.01);
Abstract

The present invention discloses a shift register unit, employed for providing a gate voltage to a nth pixel of a liquid crystal display, and comprising first to third P-type transistors, and gates of the first, second P-type transistors respectively receive gate voltages of n−2th, n−2th pixels, and first end of the first, second P-type transistors respectively receive first and second input signals, and both second ends of the first and second P-type transistors are coupled to a gate of the third P-type transistor; the gate voltages of the n−2th, n−2th pixels are respectively employed to control on-off of the first and second P-type transistors, and to make the first input signal on-off the third P-type transistor; n is a nature number larger than 2; a first end of the third P-type transistor is coupled to a first clock signal or a second clock signal, and a second end is employed as being a voltage output end to be coupled to the nth pixel. The present invention can diminish the dimension of the frame of liquid crystal display. The present invention also provides a gate driving circuit and a liquid crystal display.


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