The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Feb. 13, 2015
Microsemi Solutions (U.s.), Inc., Aliso Viejo, CA (US);
Kenneth David Wagner, Ottawa, CA;
Howard Shih Hao Chang, Vancouver, CA;
Kanwaldeep Singh Chhokar, Surrey, CA;
Redentor De La Merced, Ottawa, CA;
Yoo Ho Cho, Vancouver, CA;
MICROSEMI SOLUTIONS (U.S.), INC., Aliso Viejo, unknown;
Abstract
A method and system of merging one-bit cells in an integrated circuit layout, comprising a database to store the layout, a placer in communication with the database to update the layout, and a merger in communication with the placer. The merger is configured to: identify a set of one-bit cells in the integrated circuit layout; determine a set of merge cells, from among the identified set of one-bit cells, to be merged into a multi-bit register, the determination of the set of merge cells being based on each merge cell being located within a merge distance from each of the other merge cells in the set of merge cells, and each merge cell sharing a clock with the other merge cells in the set of merge cells; and generate instructions to the placer for merging the set of merge cells to form the multi-bit register in the integrated circuit layout.