The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Jul. 15, 2014
Applicant:

Proplus Electronics Co., Ltd., Jinan, CN;

Inventors:

Bruce W. McGaughy, Pleasanton, CA (US);

Zhenzhong Zhang, Beijing, CN;

Jun Fang, Beijing, CN;

Assignee:

PROPLUS DESIGN SOLUTIONS, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5036 (2013.01); G06F 17/5009 (2013.01);
Abstract

Methods and systems are disclosed related to multi-rate parallel circuit simulation. In one embodiment, a computer implemented method of partitioning the circuit into a plurality of partitions, wherein each partition is represented by a set of linear differential equations, determining a simulation time step for each partition of the plurality of partitions, grouping the plurality of partitions into multiple groups, wherein each group includes one or more partitions having simulation time steps within a predefined range of each other, and solving the multiple groups with their corresponding simulation time steps in parallel.


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